![]() ![]() Presented by: Doug Perry, Doulos Srivatsa Vasudevan, Synopsys. Technical Tutorial: "UVM Tips and Tricks Plus Preparing for IEEE UVM" SystemC Synthesis Standard: Which Topics for Next Round?.The Proposed Accellera SystemC Synthesizable Subset.How High-level Synthesis Works: An Intro for Hardware Designers.Presented by Bob Condon, Intel Frederic Doucet, Qualcomm Peter Frey, Mentor Graphics Mike Meredith, Cadence Dirk Seynhaeve, Intel Technical Tutorial: "Cut Your Design Time in Half with Higher Abstraction" Formal Specification, SystemVerilog Assertions & Coverage.SystemVerilog Assertions Verification with SVAUnit.Presented by Ionut Ciocirîan, AMIQ Andra Radu, AMIQ Rodrigo Calderón-Rico, Intel Israel Tapia, Intel Technical Tutorial: "SVA Advanced Topics: SVAUnit and Assertions for Formal" The tutorial covers requirements and areas of concern for the new standard, data types, the new nodetype, connectivity, hierarchy, adapters, power-aware, filtering, and other concepts. This tutorial provides an introduction to the concepts underlying the upcoming SystemVerilog-AMS language standard. Presented by Martin Vlach, Mentor Graphics Scott Little, Intel Video Presentations and Tutorials Technical Tutorial: "SystemVerilog-AMS: The Future of Analog/Mixed-Signal Modeling"
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